Key Takeaways
- • Agentrys raised $24.5 million in total funding ($19.1 million oversubscribed seed led by Etna Labs; $5.4 million pre-seed led by MediaTek) to commercialize an agentic design automation platform for semiconductor chip development.
- • The company achieved over 90% accuracy on NVIDIA's public CVDP verification benchmark, positioning it among the first platforms to exceed this threshold for autonomous chip design workflows.
- • Agentrys demonstrated a fully autonomous multi-agent workflow that completed a 32-bit CPU design from specification through sign-off-clean GDS layout without human intervention, validating the core value proposition.
- • Founder Mark Ren, former leader of ChipNeMo (NVIDIA Research's first industrial LLM for chip development), brings nearly three decades of EDA and AI expertise from NVIDIA and IBM Research to lead the venture.
- • The platform addresses a critical market need by enabling semiconductor teams to build, customize, and continuously improve proprietary AI agents rather than relying on vendor-controlled fixed toolsets; the company is already engaged with multiple fabless companies, a leading global foundry, and chip startups.
Summary
Agentrys, a stealth-stage semiconductor automation startup, has secured $24.5 million in venture funding to scale its agentic design automation platform, which automates and accelerates chip development workflows through customizable AI agents. The funding round was led by Etna Labs with a $19.1 million seed investment, building on an earlier $5.4 million pre-seed round led by MediaTek, signaling strong strategic interest from both traditional venture and semiconductor industry players.
The company's core innovation centers on autonomous multi-agent systems that can execute complex chip design tasks without direct human intervention. Agentrys has demonstrated this capability by completing a full 32-bit CPU design cycle—from initial specification through sign-off-clean GDS layout—using only autonomous agent workflows. Performance validation comes from NVIDIA's public CVDP (Circuit Verification Design Proxy) benchmark, where Agentrys achieved over 90% accuracy, positioning the company among the first platforms to clear this technical threshold for chip verification tasks.
The platform's differentiation lies in its "open" architecture. Rather than offering designers a fixed, vendor-controlled set of pre-built AI agents, Agentrys enables semiconductor teams to build, own, and continuously improve proprietary agentic workforces tailored to their unique tools, infrastructure, and development processes. The underlying design intelligence layer learns from customer data and usage patterns, with specialized models and agent-native tooling expanding the scope of tasks agents can execute across chip verification and physical design flows.
Founded by Mark Ren, the company leverages deep institutional expertise in chip design and AI research. Ren previously led ChipNeMo at NVIDIA Research, described as the first industrial large language model purpose-built for chip development. His background spans nearly three decades in electronic design automation and AI research at NVIDIA Research and IBM Research. The broader team includes engineers and researchers from NVIDIA, Meta, AMD, Samsung, Google, and Siemens, reflecting significant talent concentration from leading semiconductor and cloud computing firms.
Agentrys is already in commercial deployment with multiple customer categories, including several major fabless semiconductor companies, a leading global foundry, and chip startups spanning digital and analog design flows. The funding will support hiring, development of agent-native tooling, and expansion of customer engagements across verification and physical design workflows. The venture addresses a structural challenge in semiconductor design: the growing complexity of modern chips combined with constrained engineering talent, making automation increasingly critical to development velocity and time-to-market.
The company's core innovation centers on autonomous multi-agent systems that can execute complex chip design tasks without direct human intervention. Agentrys has demonstrated this capability by completing a full 32-bit CPU design cycle—from initial specification through sign-off-clean GDS layout—using only autonomous agent workflows. Performance validation comes from NVIDIA's public CVDP (Circuit Verification Design Proxy) benchmark, where Agentrys achieved over 90% accuracy, positioning the company among the first platforms to clear this technical threshold for chip verification tasks.
The platform's differentiation lies in its "open" architecture. Rather than offering designers a fixed, vendor-controlled set of pre-built AI agents, Agentrys enables semiconductor teams to build, own, and continuously improve proprietary agentic workforces tailored to their unique tools, infrastructure, and development processes. The underlying design intelligence layer learns from customer data and usage patterns, with specialized models and agent-native tooling expanding the scope of tasks agents can execute across chip verification and physical design flows.
Founded by Mark Ren, the company leverages deep institutional expertise in chip design and AI research. Ren previously led ChipNeMo at NVIDIA Research, described as the first industrial large language model purpose-built for chip development. His background spans nearly three decades in electronic design automation and AI research at NVIDIA Research and IBM Research. The broader team includes engineers and researchers from NVIDIA, Meta, AMD, Samsung, Google, and Siemens, reflecting significant talent concentration from leading semiconductor and cloud computing firms.
Agentrys is already in commercial deployment with multiple customer categories, including several major fabless semiconductor companies, a leading global foundry, and chip startups spanning digital and analog design flows. The funding will support hiring, development of agent-native tooling, and expansion of customer engagements across verification and physical design workflows. The venture addresses a structural challenge in semiconductor design: the growing complexity of modern chips combined with constrained engineering talent, making automation increasingly critical to development velocity and time-to-market.
Go deeper than the headline
Research every firm in this story, track the ones that matter and get the daily briefing — free for 7 days.